1. Technical Field
The present disclosure relates to chip-type solid electrolytic capacitors which can be surface-mounted, and mounting assemblies.
2. Description of the Related Art
With higher speed and higher frequency operation of an electronic device, research has been conducted to improve an impedance characteristic of a capacitor.
In particular, there has been a strong demand for a reduction in size and an increase in capacitance of a solid electrolytic capacitor used around the central processing unit (CPU). Additionally, in response to the higher frequency operation of an electronic device, there has been a strong demand for a solid electrolytic capacitor to have a low equivalent series resistance (ESR), high noise-reduction performance, quick transient response, and low equivalent series inductance (ESL).
As FIG. 1 illustrates, conventional solid electrolytic capacitor 200 includes a plurality of plate-like capacitor elements.
Cathode portion 204 of first capacitor element 201 and cathode portion 204 of second capacitor element 202 are stacked. Anode portion 203 of first capacitor element 201 and anode portion 203 of second capacitor element 202 respectively extend in a first direction and a second direction which are opposite to each other across stacked cathode portions 204. Anode portion 203 of first capacitor element 201 which extends in the first direction is joined to first anode terminal 206. Anode portion 203 of second capacitor element 202 which extends in the second direction is joined to second anode terminal 207.
Insulating layer 205 is disposed around the outer periphery of an end portion of each of cathode portions 204 of first capacitor element 201 and second capacitor element 202. Cathode portion 204 of first capacitor element 201 and cathode portion 204 of second capacitor element 202 are electrically insulated from each other by insulating layers 205.
First capacitor element 201 is electrically connected to first cathode terminal 208 via first cathode frame 212 and conductive paste 210. First capacitor element 201 is electrically insulated from second cathode terminal 209 by insulating paste 211. In a similar manner to first capacitor element 201, second capacitor element 202 is electrically connected to second cathode terminal 209 via second cathode frame 213 and conductive paste 210. Second capacitor element 202 is electrically insulated from first cathode terminal 208 by insulating paste 211.
As FIG. 2 illustrates, bottom exposed portion 218 of first cathode terminal 208 is connected to cathode portion 204 of first capacitor element 201. Bottom exposed portion 219 of second cathode terminal 209 is connected to cathode portion 204 of second capacitor element 202. Bottom exposed portions 218 and 219 extend along an axis connecting bottom exposed portion 216 of first anode terminal 206 and bottom exposed portion 217 of second anode terminal 207. Bottom exposed portion 218 and bottom exposed portion 219 are opposite to each other across the axis.
With such a structure, high-frequency noise components included in the current applied to solid electrolytic capacitor 200 flows into two independent first cathode terminal 208 and second cathode terminal 209, and efficiently flows into the ground of the circuit board. This improves the impedance characteristic of the solid electrolytic capacitor used in a high-frequency region.
For example, Patent Literature (PTL) 1 discloses a conventional technique related to the present disclosure.